SC-1 I/O-Cross Reference

This is a cross reference table arranged according to MCU pin. From this table it is easy to see which output/input pins are available and in which connector they are. This is also usefull in determining which functions are mutually exclusive and what is the effect of MCU mode on the available functions.

Although I have triple checked and cross checked this list, if this list and schematics differ trust the schematics as it is bound to be in sync with the PCB because a CAD software was used, see also my dislaimer .

This table is also available as spread sheet in an OpenOffice.org format, so that you can arrange the data according to your needs.

18.5.2003, Kusti

PORT Description Pin Function

Func Con Func Con Func Con Func Con Fun Con



Mode 4/5 Mode 6 Mode 7









Port 1 * 8-bit I/O port P17/PO15/TIOCB2/TCLKD 8-bit I/O port also functioning as DMA controller output pins



IO IR_TX QP1B J8-7





P16/PO14/TIOCA2 (DACK0 and DACK1), TPU I/O pins (TCLKA, TCLKB,

MD4B J19-2





SPI_CS8 J2-1


P15/PO13/TIOCB1/TCLKC TCLKC, TCLKD, TIOCA0, TIOCB0, TIOCC0, TIOCD0,



IO
QP1A J8-11

SPI_CS7 J2-4


P14/PO12/TIOCA1 TIOCA1, TIOCB1, TIOCA2, TIOCB2) and PPG output pins

MD4A J19-3





SPI_CS6 J2-6


P13/PO11/TIOCD0/TCLKB (PO15 to PO8)



IO IR_RX QP0B J8-15

SPI_CS5 J2-5


P12/PO10/TIOCC0/TCLKA




IO
QP0A J8-3

SPI_CS4 J2-8


P11/PO9/TIOCB0/DACK1


MD4C J19-4
IR_TX



SPI_CS3 J2-7


P10/PO8/TIOCA0/DACK0


MD3B J19-5
IR_RX



SPI_CS2 J2-10
Port 2 * 8-bit I/O port P27/PO7/TIOCB5/TMO1 8-bit I/O port also functioning as TPU I/O pins (TIOCA3,

MD1C J19-13

IO J8-31 KEYB J14-4


* Schmit triggered P26/PO6/TIOCA5/TMO0 TIOCB3, TIOCC3, TIOCD3, TIOCA4, TIOCB4, TIOCA5,

MD1A J19-12

IO J8-27 KEYB J14-3


input P25/PO5/TIOCB4/TMCI1 TIOCB5), 8-bit timer (channels 0 and 1) I/O pins (TMRI0,

MD1B J19-11

IO J8-23 KEYB J14-2



P24/PO4/TIOCA4/TMRI1 TMCI0, TMO0, TMRI1, TMCI1, TMO1) and PPG output pins

MD2C J19-10

IO J8-19 KEYB J14-1 SPI_CS1 J2-2


P23/PO3/TIOCD3/TMCI0 (PO7 to PO0)

MD2A J19-9









P22/PO2/TIOCC3/TMRI0


MD2B J19-8









P21/PO1/TIOCB3


MD3C J19-7









P20/PO0/TIOCA3


MD3A J19-6







Port 3 * 6-bit I/O port P35/SCK1 6-bit I/O port also functioning as SCI (channels 0 and 1) I/O

RS_RTS J22-7








* Open-drain P34/SCK0 pins (TxD0, RxD0, SCK0, TxD1, RxD1, SCK1)

IRDA_CLK









output capility P33/RxD1


RS_RX J22-2









P32/RxD0


IRDA_RX










P31/TxD1


RS_TX J22-3









P30/TxD0


IRDA_TX








Port 4 * 8-bit input P47/AN7/DA1 8-bit input port also functioning as A/D converter analog





DA1 J10-39





P46/AN6/DA0 inputs (AN7 to AN0) and D/A converter analog outputs (DA1





DA0 J10-35





P45/AN5 and DA0)





CLAD5 J10-37





P44/AN4






CLAD4 J10-33





P43/AN3






AD3 J8-39





P42/AN2






AD2 J8-37





P41/AN1






AD1 J8-35





P40/AN0






AD0 J8-33

SPEED J23-5
Port 5 * 4-bit I/O P53/ADTRG 4-bit I/O port also functioning as SCI (channel 2) I/O pins

REFPULSE










P52/SCK2 (TxD2, RxD2, SCK2) and A/D converter input pin (ADTRG)

SPI_CLK J2-9




J2-9 SPI_CLK J23-8


P51/RxD2


SPI_IN J2-11




J2-11 SPI_IN J23-3


P50/TxD2


SPI_OUT J2-12




J2-12 SPI_OUT J23-7
Port 6 * 8-bit I/O P67/IRQ3/CS7 8-bit I/O port also functioning as DMA
8-bit I/O port NC









* Schmitt triggered P66/IRQ2/CS6 controller I/O pins (DREQ0, TEND0,
also functioning ETHERNET IRQ









input P65/IRQ1 DREQ1, TEND1), bus control output pins
as interrupt LCD D3 J11-7








(P64 to P67) P64/IRQ0 (CS4 to CS7), and interrupt input pins (IRQ0
input pins LCD D2 J11-8









P63/TEND1 to IRQ3)
(IRQ0 to LCD D1 J11-5









P62/DREQ1

IRQ3) LCD D0 J11-6









P61/TEND0/CS5


NC










P60/DREQ0/CS4


MOC








Port A * 8-bit I/O PA7/A23/IRQ7 When DDR = 0 (after reset): When DDR = Dual function IRQ (PE7)









* Built-in MOS input PA6/A22/IRQ6 dual function as input ports 0 (after reset): as I/O ports IRQ (PE6)









pull-up PA5/A21/IRQ5 and interrupt input pins (IRQ7 dual function and interrupt







PROBE J23-2

* Open-drain ouput
to IRQ5) as input ports input pins EXTBUS









capability
When DDR = 1: address and interrupt (IRQ7 to EXTBUS









* Schmitt triggered
output input pins IRQ4) EXTBUS









input

(IRQ7 to
EXTBUS










PA4/A20/IRQ4 Address output IRQ4)
EXTBUS










PA3/A19 to PA0/A16 Address output When DDR =
EXTBUS












1: address output
EXTBUS








Port B * 8-bit I/O PB7/A15 to PB0/A8 Address output When DDR = I/O port EXTBUS









* Built-in MOS input

0 (after reset):
EXTBUS









pull-up

input port
EXTBUS












When DDR =
EXTBUS












1: address
EXTBUS












output
EXTBUS












I/O port
EXTBUS








Port C * 8-bit I/O PC7/A7 to PC0/A0 Address output When DDR = I/O port EXTBUS









* Built-in MOS input

0 (after reset):
EXTBUS









pull-up

input port
EXTBUS












When DDR =
EXTBUS












1: address
EXTBUS












output
EXTBUS












I/O port
EXTBUS








PORT D * 8-bit I/O PD7/D15 to PD0/D8 Databus input/output
I/O port EXTBUS









* Built-in MOS input



EXTBUS









pull-up



EXTBUS








PORT E * 8-bit I/O PE7/D7 In 8-bit bus mode: I/O port
I/O port



IO(PU) J10-31 KEYB J14-8


* Built-in MOS input PE6/D6 In 16-bit bus mode: data bus input/output





IO(PU) J10-27 KEYB J14-7


pull-up PE5/D5






IO(PU) J10-23 KEYB J14-6



PE4/D4






IO(PU) J10-19 KEYB J14-5



PE3/D3


REF3 J19-18

IO(PU) J10-15





PE2/D2


REF2 J19-21

IO(PU) J10-11





PE1/D1


REF1 J15-24

IO(PU) J10-7





PE0/D0


REF4 J19-15

IO(PU) J10-3



PORT F * 8-bit I/O PF7/ø When DDR = 0: input port
I/O port CLOCK (NC)











When DDR = 1 (after reset): ø output





























































PF6/AS AS, RD, HWR, LWR output

EXTBUS










PF5/RD


EXTBUS










PF4/HWR


EXTBUS










PF3/LWR


EXTBUS










PF2/LCAS/WAIT/BREQO When WAITE = 0 and BREQOE = 0 (after

LDC_RS J11-12










reset): I/O port














When WAITE = 1 and BREQOE = 0: WAIT














input














When WAITE = 0 and BREQOE = 1:














BREQO output














When RMTS2 to RMTS0= B'001 to B'011,














CW2= 0, and LCASS= 0: LCAS output













PF1/BACK When BRLE = 0 (after reset): I/O port

LCD_RW J11-9









PF0/BREQ When BRLE = 1: BREQ input, BACK output

RS_CTS J22-8







Port G * 8-bit I/O PG4/CS0 When DDR = 0 (after reset): input port
I/O port CS_ETH










PG3/CS1 When DDR = 1:CS0,CS1, CS2, CS3 output

CS_RAM










PG2/CS2


CS_FLASH










PG1/CS3


LCD E J11-10









PG0/CAS DRAM space set: CAS output

RUN LED











Otherwise (after reset): I/O port




























Key to Notation














RS RS232C













LCD LCD-Display













CS Chip Select













IO Digital Input/Output













MOC Motor Over Current













AD Analog (voltage mode) input













ADCL Analog (current loop) input













DA Digital Analog Output













IO(PU) Digital Input/Output with pull-up













IRDA IrDA













REF Ref sensor input













PULSE Ref sensor feed pulsing/on board SPI select













SPEED Speed control potentiometer input













MD Motor (half bridge) drive control output













EXTBUS External Bus from MCU













KEYB 16-Key Keypad Input or Output













IRQ Interrupt Request













SPI SPI-Bus Line













QP Quadrature pulse input













IR Infrared Transceiver Input or Output